AkshayaPatra: Inexpensive CPLD Learning Platform for Digital Electronics Labs

Rahul Sharma -

Summary

AkshayaPatra is a low-cost, CPLD-based digital circuits experimentation board designed to replace obsolete TTL labs and introduce students to programmable logic and microcontroller interfacing. Built around a Xilinx XC9572XL CPLD and an on-board ATmega328 JTAG programmer, it offers slide switches, LEDs, LCD, seven-segment displays, sensors and more. The platform simplifies schematic- or HDL-based design entry, pin-mapping and download of .xsvf files, making it ideal for both introductory and intermediate digital-electronics courses .

Problem & Motivation

Traditional digital-logic labs rely on 74-series TTL ICs, which are now obsolete and hard to source. Educators needed an affordable, flexible platform that:

  • Bridges basic logic and modern programmable-logic curricula
  • Eliminates dependency on outdated TTL kits
  • Introduces students to HDL design flows and microcontroller-based programmers

Solution Overview

AkshayaPatra (“inexhaustible vessel” in Sanskrit) packages a Xilinx XC9572XL CPLD, an ATmega328-based JTAG interface, and a rich set of peripherals on one PCB. Key features include:

  • Build & Program: Schematic or VHDL/Verilog-entry in Xilinx ISE; compile, pin-map in Xilinx PACE; generate .xsvf via iMPACT; upload via Arduino-based JTAG bridge
  • Peripherals: 12 slide switches, 12 LEDs, pushbuttons, 16×2 LCD, single- and four-digit SSDs, buzzer, potentiometer, LDR, LM35 sensor, RGB LED, Charlieplexed LEDs, etc.
  • Educational Scope: Supports basic-gate labs, BCD-to-7-segment decoding, counters, FSMs, UART/SPI/I²C projects, and advanced experiments (ALU, traffic-light controller, PWM and POV displays)

Implementation Method

  1. Hardware Design:
    • CPLD (XC9572XL) operates at 3.3 V, 178 MHz max; I/O pins 5 V-tolerant.
    • JTAG interface emulated by ATmega328, powered from USB + LDO regulator.
    • All CPLD and MCU I/Os broken out to jumper headers for easy wiring .
  2. Software Flow:
    • Design Entry: Schematic capture or VHDL in Xilinx ISE.
    • Synthesis & Fit: XST synthesis; PACE pin-mapping.
    • .xsvf Generation: iMPACT → Create XSVF.
    • Programming: Upload .xsvf via JTAG.exe on PC to AkshayaPatra board .
  3. Lab Exercises:
    • Basic Gates & Building Blocks: AND/OR/NOT, adders, comparators.
    • Digital Systems: BCD→SSD decoder; 4-bit up/down counter; shift registers; FSMs.
    • Peripherals Integration: LCD display, sensors, communication protocols (UART/SPI/I²C), PWM-driven RGB LEDs, traffic-light controller, POV displays, dice-game FSMs, and more .

Results & Impact

  • Versatility: Over 20 distinct experiments from TTL-gate emulation to microcontroller-CPLD co-design, can be performed on one platform.
  • Accessibility: Eliminated cost and availability barriers of old TTL kits; students gain hands-on with industry-relevant tools (HDLs, JTAG, PACE) .
  • Educational Adoption: Successfully deployed in introductory and intermediate digital-electronics labs at NSIT, New Delhi, and featured in the INDIACom 2017 conference proceedings.

Conclusion

AkshayaPatra offers an “inexhaustible” learning resource, combining programmable-logic design, microcontroller interfacing and a broad peripheral set into a single, affordable board. By modernizing digital-logic education and familiarizing students with HDL workflows, it effectively bridges the gap between foundational TTL labs and contemporary embedded-system design.

Full paper (INDIACom 2017 proceedings): Link